In general, this invention relates to an electrically settable resistance device; more particularly, it relates to such a device that is adapted to be micro-miniaturized and to circuit arrangements including a multitude of such devices.
Circuit devices that exhibit memory have a wide and continually increasing spectrum of uses in many kinds of circuit arrangements for performing various functions in such diverse applications as communications, control systems, and computers. In such applications, the kinds of circuit arrangements in which memory devices are used include sequential switching circuits, in which the memory devices are interconnected with combinatorial logic circuits such as AND gates, OR gates, and the like. Other kinds of circuit arrangements, especially in the digital computer field, include registers within data processors and addressable memories in which many memory devices are interconnected in a matrix arrangement to provide for storage of data.
For sequential switching circuit applications and for registers within data processors, the memory devices must be erasable, i.e., be adapted to change state repeatedly during circuit operation. Likewise, memory devices for a random access memory (RAM) need to be erasable so that new data can be written into the memory during data processing operations. Another type of memory, called a read only memory (ROM), is written into before the memory is connected into the computer or other system and has the limited function of providing read out of predetermined stored data.
Highly desirable characteristics for a memory device include small size, low-power dissipation, long life, and high reliability. Substantial research and development has been directed for many years to make progress in achieving such desirable characteristics. Such research and development has involved diverse areas of technology, including magnetics, particularly with respect to magnetic cores, on a large scale for a number of years and on an on-going basis with moving magnetic media such as tape or disk; and including solid state physics, particularly with respect to junction transistors and metal oxide semiconductor transistors.
As to such progress, the integrated semiconductor chips used today contain many more memory devices than could ever have been practical using magnetic cores and generally operate faster and with less power dissipation. However, moving media storage such as magnetic tape and disk, and optical disk, is still generally required for mass storage. Commercially available "hard" or "Winchester" disks generally provide hundreds of times more storage capacity than semiconductor memories. For example, there are personal computers presently on the market that accept an optional hard disk capable of storing in excess of 100 megabytes (MB). In comparison, a one megabit dynamic random access memory (DRAM) chip, eight of which are needed at a minimum for each byte, provides the maximum capacity for semiconductor memory currently available commercially. It has been reported that a four megabit DRAM chip has been made. As to a static RAM memory chip, its organization is such that more transistors are required to define a memory cell. Because of its organization, such a static RAM chip generally has four times less density than a DRAM chip.
Solid state memory has inherent advantages of speed, low power consumption, and high reliability over moving media memory such as tape and disk. In many applications, it is impossible or impractical to use any moving parts. There are many military and other applications, including deep space missions, that impose stringent requirements narrowing available options to solid state memory. These stringent requirements include low power consumption, not only on average so as not to drain batteries or other sources of electric power, but also on a transient basis so as not to generate undue heat, fast access, radiation hardness, and high reliability.
Recent progress in increasing density in semiconductor memory is attributable to successes in reducing the size of the component transistors. It appears likely that, by following this approach, further progress toward higher density in semiconductor memory will become increasingly difficult. The smallest feature of these component transistors is now typically 1.5 microns or less. The ultimate limit of the optical lithography techniques in current use is about 0.5 micron. Smaller dimensions will require development of new lithographic techniques that have been suggested, such as e-beam or x-ray lithography. Furthermore, physical limitations place an ultimate limit on minimum transistor size. For example, the commonly used dopant 35 concentration of 10.sup.16 cm.sup.-3 provides only 10 dopant atoms in a cube 0.1 micron on a side. In addition, dealing with such factors as line resistance and edge capacitance becomes increasingly difficult as transistor size is reduced.
As stated above, memory devices are incorporated within data processors as well as within random access memories. As incorporated within data processors such as integrated circuit microprocessors, the memory devices are arranged into registers for storing program code and data manipulated in accord with the sequentially executed program code to produce an algorithmic solution to a problem. Digital computers, as conventionally organized, can, by virtue of large memory capacity and high speed components, compute solutions to arithmetic problems and retrieve records from data bases far faster than is humanly possible.
A digital computer program includes written definitions of data structures and written program code for instructing a digital computer to perform sequential tasks in manipulating data organized in accord with such defined data structures. With respect to many problems, a person having ordinary skill in the art of writing digital computer programs can relatively easily and quickly write a digital computer program that a digital computer can execute to solve the problem. Particularly for applications such as accounting systems, word processing systems, and other systems that perform repetitious tasks, the amount of time it takes to write such a digital computer program is small compared to the amount of time saved by having the digital computer manipulate the varying data in accord with the same defined algorithms.
However, many problems within a broad class of problems are impractical to solve by the conventional approach of writing and executing such digital computer programs. A representative type of such problem involves pattern recognition. Even a young child can recognize a pattern far more quickly than can the most powerful digital computer with extremely elaborate programming. The ability of the human brain to solve such problems, which are essentially impractical for a programmed digital computer to solve, has led researchers, such as J. J. Hopfield, to analyze how signals propagate within nerve cells and to propose construction of apparatus that would operate in an analogous way. Among these proposals are various proposed types of networks within a general class called electronic neural networks (ENNs). The literature concerning the various types of an ENN includes : J. J. Hopfield, Proc. National Acad. Sci., Vol. 79, pp. 2554 et seq. (1982); L. D. Jackel et al., J. Vac. Sci. Technol. B, Vol. 4, pp. 61 et seq. (1986); J. J. Hopfield et al., Science. Vol. 233, pp. 625 et seq.; a paper by T. J. Sejnowski et al., titled "Boltzmann Machines: Constraint Satisfaction Networks That Learn," published by the Department of Computer Science, Carnegie Mellon University, as Technical Report CMU-CS-84-119 (1984); and a book titled Parallel Processino, Volume 1 Foundations, published by MIT Press, Cambridge Mass., 1986.
Every ENN comprises a set of amplifiers interconnected through a network of resistors. The amplifiers may have various input/output specifications; the output of an amplifier may be a linear or a non-linear function of its input.
One type of ENN is called a Hopfield ENN, which has the following characteristics: (1) The amplifiers are nonlinear; (2). In the general case, the output of every amplifier is connected through resistive elements to the inputs of all the amplifiers; (3) The resistive element connected between the output of any amplifier i and the input of any amplifier j has substantially the same resistance as the resistive element connected between the output of amplifier j and the input of amplifier i. In a Hopfield ENN, the input/output specification for each amplifier is usually such that the output is a sigmoid monotonic function of the input. Such a sigmoidal input/output specification is shown in the above-cited article in Science (see FIG. 3(A) at page 628). The curve shown in that FIG. 3(A) may be displaced along either axis; it also may be inverted about either axis. J. J. Hopfield has shown that a Hopfield ENN may be described mathematically and has certain desirable features. One such desirable feature is that, for any input state, there is a unique stable output state. The resistive elements used in a Hopfield ENN are adjusted to "program" the ENN for a specific problem or to store information in the ENN for later recall.
In a Hopfield ENN comprising a set of N amplifiers, an array of N.sup.2 resistors must be provided. Each resistor must be settable to provide a particular resistance value that corresponds to a strength of connection from one nerve to another. This requirement that the resistor be "settable" to a value means that the resistor must exhibit memory. The computing power of a Hopfield ENN increases with the number of resistors in the array. Accordingly, high density is highly desirable in this context, just as high density is highly desirable in a RAM. A Hopfield ENN with an array of 1024.times.1024 resistors becomes feasible only if the individual resistors can be made as small as about a 1 micron square.
In addition to a Hopfield ENN, other types of an ENN are known. Another example of a type of ENN is called a "layered neural network." A layered neural network typically has two or more sets or layers of amplifiers arranged in a hierarchy such that the output of each amplifier is connected to the inputs of only those amplifiers in a succeeding layer. Some of these amplifiers, especially those in the first layer, may be linear amplifiers. Such a layered neural network is a "feed forward" ENN because there is no connection from the output of an amplifier in a higher layer to the input of an amplifier in a lower layer. An example of a layered neural network is described in and referred to as a Boltzmann Machine in the above-cited paper by Sejnowski et al. A layered neural network is often used as a learning network. This means that the resistive elements are iteratively altered during "training" cycles in which the output derived from a known input is compared to a "desired output"; then an algorithm is used to compute new values for the resistive elements for the next iteration.
With respect to the programming of an ENN, the Jackel et al. reference cited above discloses an ENN in which each resistor has an individually fixed value to define pre-programmed synapses. Other ENN's that are programmable have been built using numerous switching transistors for selectively connecting and disconnecting resistors into and out of the neural net to provide programmable binary synapses; however, each such binary synapse has required 10 to 20 transistors.
It is desirable to provide not only programmable synapses, but also more than two resistance values per synapse, as is the case with a binary synapse. Providing for more than two resistance values per synapse would be very difficult with existing technology. Extending the switching transistor approach taken in providing programmable binary synapses would entail hundreds of transistors per synapse, and this would severely limit the number of synapses for the neural net.